Senior ASIC Power Engineer at Mercor

Senior ASIC Power Engineer | $100–135/hr | Sunnyvale, CA (On-Site)

Join a prestigious tech company's AR/VR division as a Senior ASIC Power Engineer, driving power analysis and optimization for cutting-edge silicon products. This is a W-2, full-time role administered through Cincinnatus, placing you directly within a high-impact client engineering team. Machine Learning hardware is a key area of focus.

Key Responsibilities

• Perform PPA optimization using Fusion Compiler
• Conduct RTL and netlist-level power analysis
• Develop scripts for report post-processing, format conversion, and data extraction
• Set up, run, debug, and analyze ASIC flow reports covering Synthesis, Physical Design, Power, and Timing
• Implement design blocks at RTL and UPF levels
• Clearly document findings and communicate results to cross-functional teams

Required Qualifications

• 10+ years of experience as an ASIC Power, CAD, or Physical Design Engineer
• Hands-on experience with power estimation tools, synthesis, and physical design
• Strong understanding of power trade-offs in design and back-end implementation
• Proficiency in scripting and data analysis (Python, Tcl, SystemVerilog)
• BS in Electrical Engineering, Computer Science, or equivalent experience

Preferred Qualifications

• Experience with Synopsys tools (DC, ICC, PTPX/PrimePower, VCS, Verdi) and/or Cadence Joules
• Python, Perl, or similar scripting for data post-processing
• Excel or MATLAB for model fitting, data visualization, and analysis
• Experience with low-power design methodologies and UPF power intent specifications
• Silicon power characterization background
• Power profiling experience at IP/SoC level

Work Authorization

Applicants must be located in the United States. Visa sponsorship is not available for this role.