ASIC/SoC Design & Verification Engineer | $70–100/hr | Remote in US (Part-Time, 20–40 hrs/week)
Join a leading AI lab's GenAI team and apply your real-world chip design and verification expertise to help shape how advanced AI models understand hardware engineering. This is a structured W-2 part-time role through Cincinnatus LLC, placing you directly within a top-tier AI lab's extended workforce.
About the Role
This team is building out a group of experienced chip engineers — from new grads to seasoned silicon veterans — to create realistic, high-quality hardware engineering problems and solutions that are used to train and evaluate cutting-edge AI models. If you've debugged across multiple blocks, architected RTL from scratch, or driven a design through tapeout, your hands-on judgment is exactly what's needed here.
Key Responsibilities
- Design realistic chip engineering problems drawn from your own professional experience — design, debugging, or verification work you've actually performed.
- Develop complete solutions including reference RTL, testbenches, and supporting materials using SystemVerilog/Verilog.
- Evaluate AI model responses to your problems, identifying strengths and weaknesses with clear technical reasoning.
- Collaborate with fellow engineers to maintain a consistent standard of rigor and difficulty across all contributions.
Core Qualifications
- Hands-on ASIC/SoC design and/or functional verification experience; production silicon tapeout exposure is a strong plus.
- Strong fluency in SystemVerilog/Verilog.
- Proficiency with industry toolchains such as Synopsys VCS, Cadence Xcelium, Siemens Questa, VC Formal, or Verdi; open-source tools (Icarus Verilog, Verilator, CocoTB, Yosys, OpenROAD) also valued.
- Solid understanding of SoC-level concerns: interface protocols, handshaking, backpressure, clock domain crossing, and multi-module dataflow.
- Deep expertise in at least one area: RTL design & microarchitecture; IP integration & bring-up (NoC, PCIe, DDR, ARM/AXI); functional verification (UVM, SVA, CocoTB); formal verification & coverage closure; PPA/timing/synthesis optimization; analog/mixed-signal DV; or specification authoring.
- Availability to commit 20–40 hours per week with no scheduling conflicts.
- Strong written communication skills and ability to work independently.
- Prior experience in AI training, model evaluation, or data annotation is a bonus.
Employment Details
This is a part-time W-2 position employed by Cincinnatus LLC, an enterprise staffing company that partners with leading technology firms. Cincinnatus serves as the employer of record, handling payroll, benefits, and compliance, while you integrate directly into the client's team and workflows. This is a fully remote role within the United States.
Cincinnatus LLC is an Equal Employment Opportunity employer committed to diversity, inclusion, and providing reasonable accommodations for qualified individuals with disabilities.
